• Advanced FPGA Verification Engineer

    Posted Date 3 weeks ago(5/2/2018 11:51 AM)
    Job Location
    Required Clearance
    Employment Type
    Full Time
    Hiring Company
    General Dynamics Mission Systems
  • Basic Qualifications

    Bachelor's degree in Electrical or Computer Engineering, a related specialized area or field is required (or equivalent experience) plus a minimum of 5 years of relevant experience; or Master's degree plus a minimum of 3 years of relevant experience.



    Department of Defense security clearance is not required at time of hire but a Secret Clearance must be obtainable within 24 months of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information.


    Due to the nature of work performed within our facilities, U.S. citizenship is required.

    Responsibilities for this Position

    General Dynamics Mission Systems has an immediate opening for an Advanced FPGA Verification Engineer.  This position provides an opportunity to further advance the cutting-edge technology that supports some of our nation’s core defense/intelligence services and systems.  General Dynamics Mission Systems employees work closely with esteemed customers to develop solutions that allow them to carry out high-stakes national security missions.


    Advanced FPGA Verification Engineers will work with military electronic equipment and systems at GDMS including avionics mission computers, stores management systems, signal and radar processing systems and related equipment.  The selected candidate will participate in a team environment to perform FPGA Verification utilizing UVM, System Verilog, and constrained random stimulus. 

    • HDL Coding with Verilog/System Verilog
    • Object Oriented Programming
    • Behavioral and register transfer level (RTL) Simulation
    • FPGA design
    • Direct Programming Interface (DPI)
    • Linux and scripting
    • Mentor QuestaSim experience
    • Responsible for verification and documentation of FPGA (Field Programmable Gate Array) developments
    • Create test and verification plans that establish functional criteria
    • Verify test results and analyze performance
    • Exercise creative thinking and ideation to advance our business performance
    • Deliver innovative, flexible, integrated solutions to meet customers changing business needs
    • Support and engage in programs, projects and practices behind the General Dynamics Mission Systems culture and strategy, and comply with all policies and procedures
    • Follow industry and department trends and developments to ensure General Dynamics Mission Systems services are consistent with, and/or superior to, industry best practices
    • Occasional travel may be required


    Candidates must demonstrate a passion for innovation, a sophisticated understanding of electronic equipment and systems, the ability to further advance General Dynamics Mission Systems technology, and hold an active DOD security clearance.

    The successful candidate will have experience with the following:

    • FPGA design and verification tasks
    • Board and Module digital logic design
    • Expert level Verilog coding skills
    • Familiar with constrained random verification approaches
    • Experience with high speed interfaces and complex memories
    • Network Protocols such as 1G Ethernet, Fibre Channel, 1553 and PCIe
    • Expertise with various scripting languages and scripting approaches
    • Develop verification plan and documentation, UVM testbench, System Verilog assertions, and functional coverage models to support coverage-driven verification.
    • Has experience with advanced functional verification methodologies (OVM/UVM)
    • Must be familiar with SystemVerilog assertions
    • Must be familiar with the Mentor Graphics verification IP and tool set
    • Needs to be an experienced SystemVerilog user and understand Object Oriented Design
    • Should be knowledgeable with various scripting languages such as TCL, Perl, shell and Make

    Experience with several of the following is highly desired:

    • Mentor Precision (FPGA)

    • Altera Quartus
    • Xilinx ISE/Vivado


    • At least 8 years of relevant work experience consisting of FPGA Verilog HDL Digital Logic Design techniques, methodologies and related verification activities
    • Familiar with high speed switch design approaches

    Experience with most, if not all of the following electronic design automatic (EDA) design tools:

    • Mentor QuestaSim Mentor Precision (FPGA)
    • Altera Quartus
    • Xilinx ISE/Vivado



    • Bachelor's or Master's degree in Electrical Engineering or equivalent




    Company Overview

    General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation.  With a global team of 13,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas.  Given the nature of our work and who we are, we value trust, honesty, alignment and transparency.  We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose.  You will also enjoy a flexible work environment where contributions are recognized and rewarded.  If who we are and what we do resonates with you, we invite you to join our high performance team!


    General Dynamics is an Equal Opportunity/Affirmative Action Employer that is committed to hiring a diverse and talented workforce.  EOE/Disability/Veteran


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