• Senior FPGA Design Engineer

    Posted Date 2 months ago(2 months ago)
    Job Location
    Employment Type
    Full Time
    Hiring Company
    General Dynamics Mission Systems
  • Basic Qualifications

    Bachelor's degree in Electrical or Computer Engineering, a related specialized area or field is required (or equivalent experience) plus a minimum of 8 years of relevant experience; or Master's degree plus a minimum of 6 years of relevant experience.



    Department of Defense Secret security clearance is not required at the time but must be obtainable within 24 months. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information.



    Due to the nature of work performed within our facilities, U.S. citizenship is required.

    Responsibilities for this Position

    General Dynamics Mission Systems has an immediate opening for a Senior Field Programmable Gate Array (FPGA) Design Engineer to join our team. The position provides an opportunity to develop the cutting-edge technology that supports some of our nation's fundamental defense services. General Dynamics Mission Systems employees work closely with esteemed clients to develop solutions that allow them to carry out high-stakes national security missions.


    Senior FPGA Design Engineers research, design, develop and test military electronic equipment and systems at GDMS including: avionics mission computers, stores management systems, signal and radar processing systems and related equipment.

    The successful candidate will participate in a team environment to execute Requirement Decomposition, FPGA Digital Logic Design, Synthesis, Timing Analysis, Verification, and integration activities.

    • Responsible for requirement definition/clarification, design, verification, associated documentation for FPGA development, design revision control and archival
    • Determines detailed design approach
    • Defines FPGA interfaces and all aspects of device design and simulation
    • Evaluates and tailors process flow including but not limited to high level design, synthesis, place and route, timing and power utilization for programs
    • Creates test and verification plans that establish functional criteria to ensure requirements are met
    • Verifies test results against requirements and analyzes performance
    • May provide leadership and/or direction to lower level employees


    An experienced Senior FPGA Design Engineer is being sought for digital logic design activities targeting FPGAs for a military environment. The position requires familiarity with a variety of digital logic design techniques including FPGA, PWB, electronic module, and lab checkout. This position requires a self-starter, able to translate customer requirements into a cost-effective design that is optimized for manufacturing and periodic operational maintenance. The candidate must be able to multitask and prioritize while dealing with several projects.

    The successful candidate will have many (or all) of the following abilities / experience:

    • Decomposed statements of work into digital logic design requirements and used formal methodologies/tools to capture and track requirements
    • Successfully participated in FPGA design and verification teams to ensure all requirements were implemented and verified
    • Familiar with high speed switch design approaches
    • Participated in a team environment to execute FPGA Logic Design activities targeting Xilinx and/or Altera FPGAs, Synthesis, Timing closure, Verification and Lab FPGA integration
    • Board and Module digital logic design experience and been a member of a successful integration team
    • Very familiar with constraint generation and constraint driven synthesis and timing closure techniques
    • Expert level Verilog coder
    • Familiar with VHDL
    • Familiar with constrained random verification approaches
    • High speed interfaces and complex memories
    • Embedded micro-processing systems
    • Network Protocols such as 10G Ethernet, Fibre Channel, 1553, 1394 and PCIe
    • Integration of 3rd party IP
    • Expertise with various scripting languages and scripting approaches
    • Familiar with Mentor Questa


    • At least 15 years of relevant work experience consisting of FPGA Verilog HDL Digital Logic Design techniques, methodologies, and related verification activities. Familiarity with digital signal processing and various digital video formats is a plus.


    • Bachelor's or Master's degree in Electrical Engineering



    Company Overview

    General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation.  With a global team of 13,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas.  Given the nature of our work and who we are, we value trust, honesty, alignment and transparency.  We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose.  You will also enjoy a flexible work environment where contributions are recognized and rewarded.  If who we are and what we do resonates with you, we invite you to join our high performance team!


    General Dynamics is an Equal Opportunity/Affirmative Action Employer that is committed to hiring a diverse and talented workforce.  EOE/Disability/Veteran


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