Bachelor's degree in Electrical or Computer Engineering, a related specialized area or field is required (or equivalent experience) plus a minimum of 10 years of relevant experience; or Master's degree plus a minimum of 8 years of relevant experience
Ability to otain a Department of Defense TS/SCI security clearance within 24 months of hire is required. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.
A Relocation package may be available for this position.
General Dynamics Mission Systems has an immediate opening for a Senior Principal ASIC/FPGA engineer. This position provides an opportunity to further advance the cutting-edge technology that supports some of our nation’s core defense/intelligence services and systems. General Dynamics Mission Systems employees work closely with esteemed customers to develop solutions that allow them to carry out high-stakes national security missions.
The Senior Principal ASIC/FPGA Engineer will possess in-depth field programmable gate arrays (FPGA), digital signal processor (DSP), and/or global positioning system (GPS) experience utilizing Verilog/SystemVerilog for integrated circuit (IC) design and verification. S/he will support ASIC complementary metal-oxide semiconductor (CMOS) technologies 45nm or smaller and support DSP and/or custom digital interface design or verification tasks for IC devices to be utilized in hi-reliability space-based communications systems. In this role the Senior Principal ASIC/FPGA Engineer will be responsible for the following:
In addition, the successful candidate must:
The Senior Principal ASIC/FPGA Engineer position requires a Bachelor's Degree in Electrical, Computer or Systems Engineering, Computer Science or a related specialty or the equivalent experience, and a minimum of ten years of related experience. A Master’s Degree in related specialty and a minimum of eight years of related experience is preferred.
The successful candidate must have eight to ten years of directly related ASIC and/or FPGA design experience and demonstrate a passion for innovation, a sophisticated understanding of advanced electronics systems, and the ability to further advance and support GDMS.
Experience with most, if not all, of the following languages and processes are highly desired:
Experience with most, if not all, of the following electronic design automation (EDA) design tools from Synopsys and Mentor Graphics highly desired such as:
General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 13,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high performance team!
General Dynamics is an Equal Opportunity/Affirmative Action Employer that is committed to hiring a diverse and talented workforce. EOE/Disability/Veteran